The difficulties of the 970 @ 90nm.

[oldmacfan]

Finally, some information that starts to clear the air as to the difficulties that IBM has been having. This is a tough read for some but it is a wealth of information.

http://www.macnewsworld.com/story/36471.html

[hobbit.2]

If I understood the article right, it is basically saying that even though IBM publicly stated to have certain technologies available, like SSDOI (Strained Silicon Directly on Insulator) or low-k dielectric, none of these are in fact used in the 90nm PPC chips yet.

So the question is why?
Maybe because these technologies are much more difficult to master in mass production than IBM anticipated?

But could this mean that once they are mastered we would see a nice jump in performance and speed?

And what does it have to do with the rumored change of strategy to go multi-core rather sooner than originally planned? Would this indicate that these new technologies are still far off from being mastered? That there are a lot of problems still? Or does it mean they do not in fact improve performance that much?

[oldmacfan]

If I understood the article right, it is basically saying that even though IBM publicly stated to have certain technologies available, like SSDOI (Strained Silicon Directly on Insulator) or low-k dielectric, none of these are in fact used in the 90nm PPC chips yet.

So the question is why?
Maybe because these technologies are much more difficult to master in mass production than IBM anticipated?

But could this mean that once they are mastered we would see a nice jump in performance and speed?

And what does it have to do with the rumored change of strategy to go multi-core rather sooner than originally planned? Would this indicate that these new technologies are still far off from being mastered? That there are a lot of problems still? Or does it mean they do not in fact improve performance that much?
Those are some interesting thoughts, but what I didn't see is any information as to when they got the chip. Some of the new processes could have already been added to the chips without having to call it a new chip.

If they had an early XServe chip versus one of the other 90nm chips that have been released since then, there could already be chips with some of the missing processes.

[nowayout11]

Interesting read. ;)

SSDOI and other technologies are new. Getting it into a retail product will take some more time still. Even SOI took more time than expected, if I recall correctly. These technologies improve efficiency, which can turn into improved performance (which they usually do)... but the performance isn't guaranteed. For example, Low-K isn't going to produce a full 30% peformance boost in real-world products all on its own like IBM suggests.

Some of these technologies simply make computing at 90nm and under more feasible on the whole. They'll implement them in phases ahead of the curb, as needed, so it's not as chaotic like trying to get all processes and technologies to work with each other all at once. Useless factoid: Companies started adding copper interconnects into their chips at 180 nm, but the real benefits weren't realized until 130 nm.

They could face delays trying to incorporate too many new technologies at once... like a serious "stuck at 500MHz for well over a year" type of delay. This also hurt AMD when they and IBM were trying to get SOI on the Opteron and Athlon 64 chips with copper at 130 nm. They may have tried to do too much at once as the SOI process fought them.

They'll incorporate these things in phases as they master the techniques, each one helping to increase the performance each time to keep up with the market. There won't be a single event where a chip jumps a full GHz or anything like that. :) Although, that would be nice.

[Henriok]

Very interessiting. What they are saying is that IBm didn't do much than just shrink the fabrication process. They didn't use any of the new exotic techniques that they said they'd do. It may be the reason why the 970X didnt reach 3 GHz and it might be the reason for the delay. they might have made prototypes including the new tech but the process wasn't mature and it didn't work as advertised so they back tracked and used what they knew worked. In the process they lost some time and didn't push the envelope as far as they expected.

We'll if they did reach 2.5 GHz by using the same old technology, it's pretty impressive I think. When they finally get the new stuff woking we might see some more impressive stuff comming off IBM's 90 nm fabrication process.

[iMeowbot]

If I understood the article right, it is basically saying that even though IBM publicly stated to have certain technologies available, like SSDOI (Strained Silicon Directly on Insulator) or low-k dielectric, none of these are in fact used in the 90nm PPC chips yet.
Sorta kinda. IBM (and most other semi manufacturers!) show off lots of things that have worked out in R&D labs, but a whole lot more work has to be done before such things will be ready for prime time.
So the question is why?
Maybe because these technologies are much more difficult to master in mass production than IBM anticipated?
Armonk is a long way from Redmond :) I'm sure they want to spend some quality time with new techniques to make sure they are reliable, before sending them out to customers!