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Originally Posted by staph
With respect, I think this might be one of those situations which is designed for that great Australian phrase: "put up or shut up".
What are you trying to tell us?
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Fair enough:
Antares is a dual core (two processors on single die) follow-on to Altair, using IBM's CMOS SOI10K technology with SOI (Silicon On Insulator) and copper bus with 10 layers of metal. Each core has a 1M L2 cache. L3 cache is not supported.
How is this for a start?
Morpheus
