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Kickaha
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Join Date: May 2004
 
2020-11-15, 23:22

Quote:
Originally Posted by chucker View Post
Also, data center CPUs benefit from many cores. Appleā€™s CPUs are more geared towards relatively few but fast cores.
I'm not so certain of that restriction any longer, to be honest, given some of the things we're peeking at under the hood now.

An 8-wide pipeline is kind of insane to manage, it's much the same problem as a multi-core task allocation bus, especially when you have immediate DRAM access *and* a recompilation on the fly system (caught that in the unveil?) for shuttling tasks between appropriate HW as needed.

And yet... they did it. I have a sneaking suspicion (speculation, mind you) that their multi-core capability has yet to be shown.

On a small device where power sipping is primo, if you can crank up a core when needed and throttle down when not, and have a sufficiently high ceiling of computer power, you don't really need prevalent multicore capability past the immediate (and known bounded) needs.

That doesn't mean the design *can't*, just that they *haven't*. Expanding the pipeline width makes me think they have some serious chops at this that have not yet been put to the multi-core problem.

I could be wrong, of course, but call it an informed hunch.
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